Test Condition | Delay and Loss Profile
(Note 1) |
Performance Objectives for Maximum Delay | Requirements for Maximum Delay | Speech Quality Requirements
(Note 2) |
---|---|---|---|---|
0 | Error and jitter free condition | TS + TR ≤ 157ms | TS + TR ≤ 197ms | No requirement, reference score MOS-LQOREF |
1 | dly_profile_20msDRX_10pct_BLER_e2e | TS + TR ≤ 157ms | TS + TR ≤ 197ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.4 |
2 | dly_profile_40msDRX_10pct_BLER_e2e | TS + TR ≤ 197ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.4 |
3 | dly_profile_40msDRX_22pct_BLER_e2e | TS + TR ≤ 197ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 1.0 |
NOTE 1:
The delay profiles for test condition 1 and 2 are theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 10%, with +/- 3ms of EPC jitter. The delay profile for test condition 3 is theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 22%, with +/- 6ms of EPC jitter. Delay profiles are injected at the IP layer of the test system. Delay profiles are attached electronically to document TS 26.132.
NOTE 2:
The purpose of this test is to provide a relative comparison of the objective speech quality between the reference and test conditions. This test is not to be construed as a method to evaluate the absolute objective speech quality of the device.
|
Test Condition | Delay and Loss Profile
(Note 1) |
Performance Objectives for Maximum Delay | Requirements for Maximum Delay | Speech Quality Requirements
(Note 2) |
---|---|---|---|---|
0 | Error and jitter free condition | TS + TR ≤ 157ms | TS + TR ≤ 197ms | No requirement, reference score MOS-LQOREF |
1 | dly_profile_20msDRX_10pct_BLER_e2e | TS + TR ≤ [157]ms | TS + TR ≤ 197ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.3 |
2 | dly_profile_40msDRX_10pct_BLER_e2e | TS + TR ≤ [197]ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.3 |
3 | dly_profile_40msDRX_22pct_BLER_e2e | TS + TR ≤ [197]ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.5 |
NOTE 1:
The delay profiles for test condition 1 and 2 are theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 10%, with +/- 3ms of EPC jitter. The delay profiles for test condition 3 is theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 22%, with +/- 6ms of EPC jitter. Delay profiles are injected at the IP layer of the test system. Delay profiles are attached electronically to document TS 26.132.
NOTE 2:
The purpose of this test is to provide a relative comparison of the objective speech quality between the reference and test conditions. This test is not to be construed as a method to evaluate the absolute objective speech quality of the device.
|
Test Condition | Delay and Loss Profile
(Note 1) |
Performance Objectives for Maximum Delay | Requirements for Maximum Delay | Speech Quality Requirements
(Note 2) |
---|---|---|---|---|
0 | Error and jitter free condition | TS + TR ≤ 157ms | TS + TR ≤ 197ms | No requirement, reference score MOS-LQOREF |
1 | dly_profile_20msDRX_10pct_BLER_e2e | TS + TR ≤ 157ms | TS + TR ≤ 197ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.4 |
2 | dly_profile_40msDRX_10pct_BLER_e2e | TS + TR ≤ 197ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.4 |
3 | dly_profile_40msDRX_22pct_BLER_e2e | TS + TR ≤ 197ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 1.0 |
NOTE 1:
The delay profiles for test condition 1 and 2 are theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 10%, with +/- 3ms of EPC jitter. The delay profile for test condition 3 is theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 22%, with +/- 6ms of EPC jitter. Delay profiles are injected at the IP layer of the test system. Delay profiles are attached electronically to document TS 26.132.
NOTE 2:
The purpose of this test is to provide a relative comparison of the objective speech quality between the reference and test conditions. This test is not to be construed as a method to evaluate the absolute objective speech quality of the device.
|
Test Condition | Delay and Loss Profile
(Note 1) |
Performance Objectives for Maximum Delay | Requirements for Maximum Delay | Speech Quality Requirements
(Note 2) |
---|---|---|---|---|
0 | Error and jitter free condition | TS + TR ≤ 157ms | TS + TR ≤ 197ms | No requirement, reference score MOS-LQOREF |
1 | dly_profile_20msDRX_10pct_BLER_e2e | TS + TR ≤ 157ms | TS + TR ≤ 197ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.3 |
2 | dly_profile_40msDRX_10pct_BLER_e2e | TS + TR ≤ 197ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.3 |
3 | dly_profile_40msDRX_22pct_BLER_e2e | TS + TR ≤ 197ms | TS + TR ≤ 237ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.5 |
NOTE 1:
The delay profiles for test condition 1 and 2 are theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 10%, with +/- 3ms of EPC jitter. The delay profiles for test condition 3 is theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 22%, with +/- 6ms of EPC jitter. Delay profiles are injected at the IP layer of the test system. Delay profiles are attached electronically to document TS 26.132.
NOTE 2:
The purpose of this test is to provide a relative comparison of the objective speech quality between the reference and test conditions. This test is not to be construed as a method to evaluate the absolute objective speech quality of the device.
|
Electrical interface type | BD [ms] |
---|---|
Analogue | 0 |
Wireless digital | 20 |
Wired digital | 20 |
NOTE:
The delay for analogue to digital conversion (and vice versa) in the wired digital connection is considered to be part of the budget allowance for vendor specific implementation in the UE delay requirements.
|
Test Condition | Delay and Loss Profile
(Note 1) |
Performance Objectives for Maximum Delay | Requirements for Maximum Delay | Speech Quality Requirements
(Note 2) |
---|---|---|---|---|
0 | Error and jitter free condition | TS + TR ≤ 157+BD ms | TS + TR ≤ 197+BD ms | No requirement, reference score MOS-LQOREF |
1 | dly_profile_20msDRX_10pct_BLER_e2e | TS + TR ≤ 157+BD ms | TS + TR ≤ 197+BD ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.4 |
2 | dly_profile_40msDRX_10pct_BLER_e2e | TS + TR ≤ 197+BD ms | TS + TR ≤ 237+BD ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.4 |
3 | dly_profile_40msDRX_22pct_BLER_e2e | TS + TR ≤ 197+BD ms | TS + TR ≤ 237+BD ms | MOS-LQOTEST ≥ MOS-LQOREF - 1.0 |
NOTE 1:
The delay profiles for test condition 1 and 2 are theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 10%, with +/- 3ms of EPC jitter. The delay profile for test condition 3 is theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 22%, with +/- 6ms of EPC jitter. Delay profiles are injected at the IP layer of the test system. Delay profiles are attached electronically to document TS 26.132.
NOTE 2:
The purpose of this test is to provide a relative comparison of the objective speech quality between the reference and test conditions. This test is not to be construed as a method to evaluate the absolute objective speech quality of the device.
|
Test Condition | Delay and Loss Profile
(Note 1) |
Performance Objectives for Maximum Delay | Requirements for Maximum Delay | Speech Quality Requirements
(Note 2) |
---|---|---|---|---|
0 | Error and jitter free condition | TS + TR ≤ 157+BD ms | TS + TR ≤ 197+BD ms | No requirement, reference score MOS-LQOREF |
1 | dly_profile_20msDRX_10pct_BLER_e2e | TS + TR ≤ 157+BD ms | TS + TR ≤ 197+BD ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.3 |
2 | dly_profile_40msDRX_10pct_BLER_e2e | TS + TR ≤ 197+BD ms | TS + TR ≤ 237+BD ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.3 |
3 | dly_profile_40msDRX_22pct_BLER_e2e | TS + TR ≤ 197+BD ms | TS + TR ≤ 237+BD ms | MOS-LQOTEST ≥ MOS-LQOREF - 0.5 |
NOTE 1:
The delay profiles for test condition 1 and 2 are theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 10%, with +/- 3ms of EPC jitter. The delay profiles for test condition 3 is theoretically constructed to simulate a semi-persistent scheduling transmission scheme with DRX enabled and initial BLER in sending and receiving directions of 22%, with +/- 6ms of EPC jitter. Delay profiles are injected at the IP layer of the test system. Delay profiles are attached electronically to document TS 26.132.
NOTE 2:
The purpose of this test is to provide a relative comparison of the objective speech quality between the reference and test conditions. This test is not to be construed as a method to evaluate the absolute objective speech quality of the device.
|