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4‑5x
Content for
TS 25.423
Word version: 18.0.0
1…
7…
9…
9.2…
9.2.2
9.2.3
9.3…
9.2.2
FDD Specific Parameters
...
9.2.2
FDD Specific Parameters
p. 566
9.2.2.a
ACK-NACK Repetition Factor
|R15|
p. 567
9.2.2.b
ACK Power Offset
|R15|
p. 567
9.2.2.A
Active Pattern Sequence Information
p. 567
9.2.2.B
Adjustment Period
p. 568
9.2.2.C
Adjustment Ratio
p. 568
9.2.2.Ca
Bundling Mode Indicator
|R6|
p. 568
9.2.2.D
Cell Capability Container FDD
|R5|
p. 568
9.2.2.E
Cell Portion ID
|R6|
p. 570
9.2.2.1
Chip Offset
p. 570
9.2.2.2
Closed Loop Mode1 Support Indicator
p. 571
9.2.2.3
Closed Loop Mode2 Support Indicator
p. 571
9.2.2.3A
Closed Loop Timing Adjustment Mode
p. 571
9.2.2.4
Compressed Mode Method
p. 571
9.2.2.4A
DCH FDD Information
p. 571
9.2.2.4B
E-DCH FDD Information
|R6|
p. 572
9.2.2.4C
E-DCH FDD Information Response
|R6|
p. 573
9.2.2.4D
E-DCH FDD DL Control Channel Information
|R6|
p. 574
9.2.2.4E
E-DCH RL Indication
|R6|
p. 576
9.2.2.4F
E-DCH FDD Information To Modify
|R6|
p. 576
9.2.2.4G
E-DCH Transport Format Combination Set Information (E-TFCS Information)
|R6|
p. 580
9.2.2.4J
E-TTI
|R6|
p. 582
9.2.2.4K
E-DPCCH Power Offset
|R6|
p. 582
9.2.2.4KA
Void
9.2.2.4L
E-DCH HARQ Power Offset FDD
|R6|
p. 582
9.2.2.4M
Void
9.2.2.4MA
Void
9.2.2.4MB
Void
9.2.2.4MC
E-DCH MAC-d Flows Information
|R6|
p. 582
9.2.2.4MD
Void
9.2.2.4ME
Void
9.2.2.4MF
Void
9.2.2.4MG
E-DCH Maximum Bitrate
|R6|
p. 584
9.2.2.4MH
Void
9.2.2.4MI
E-DCH Reference Power Offset
|R6|
p. 584
9.2.2.4MJ
Void
9.2.2.4N
Maximum Number of Bits per MAC-e PDU for Non-scheduled Transmission
|R6|
p. 584
9.2.2.4O
HARQ Process Allocation For 2ms TTI
|R6|
p. 585
9.2.2.4P
Reference E-TFCI Power Offset
|R6|
p. 585
9.2.2.4Q
Extended Reference E-TFCI Power Offset
|R7|
p. 585
9.2.2.4R
Extended Maximum Number of Bits per MAC-e PDU for Non-scheduled Transmission
|R7|
p. 585
9.2.2.4S
Transport Bearer Not Requested Indicator
|R7|
p. 586
9.2.2.4T
Transport Bearer Not Setup Indicator
|R7|
p. 586
9.2.2.5
D-Field Length
p. 586
9.2.2.6
Diversity Control Field
p. 586
9.2.2.7
Diversity Indication
p. 586
9.2.2.8
Diversity Mode
p. 586
9.2.2.9
DL DPCH Slot Format
p. 586
9.2.2.9A
DL DPCH Timing Adjustment
|R5|
p. 587
9.2.2.10
DL Power
p. 587
9.2.2.10A
DL Power Balancing Information
|R5|
p. 587
9.2.2.10B
DL Power Balancing Activation Indicator
|R5|
p. 587
9.2.2.10C
DL Reference Power Information
|R5|
p. 588
9.2.2.10D
DL Power Balancing Updated Indicator
|R5|
p. 588
9.2.2.11
DL Scrambling Code
p. 588
9.2.2.12
Downlink Frame Type
p. 588
9.2.2.12A
DPC Mode
|R4|
p. 588
9.2.2.13
DRAC Control
p. 589
9.2.2.13A
DSCH FDD Information
p. 589
9.2.2.13B
DSCH FDD Information Response
p. 589
9.2.2.13Bb
DSCH-RNTI
p. 589
9.2.2.13C
FDD DCHs To Modify
p. 589
9.2.2.13D
Enhanced DSCH PC
|R4|
p. 590
9.2.2.13E
Enhanced DSCH PC Counter
|R4|
p. 590
9.2.2.13F
Enhanced DSCH PC Indicator
|R4|
p. 590
9.2.2.13G
Enhanced DSCH PC Wnd
|R4|
p. 590
9.2.2.13H
Enhanced DSCH Power Offset
|R4|
p. 590
9.2.2.13I
Enhanced Primary CPICH Ec/No
|R5|
p. 590
9.2.2.14
FDD DL Channelisation Code Number
p. 591
9.2.2.14A
FDD DL Code Information
p. 591
9.2.2.15
FDD S-CCPCH Offset
p. 591
9.2.2.16
FDD TPC Downlink Step Size
p. 591
9.2.2.16A
First RLS Indicator
p. 591
9.2.2.17
Gap Position Mode
p. 592
9.2.2.18
Gap Period (TGP)
p. 592
9.2.2.19
Gap Starting Slot Number (SN)
p. 592
9.2.2.19a
HS-DSCH FDD Information
|R5|
p. 592
9.2.2.19aa
HS-DSCH FDD Secondary Serving Information
|R8|
p. 594
9.2.2.19b
HS-DSCH FDD Information Response
|R5|
p. 596
9.2.2.19ba
HS-DSCH FDD Secondary Serving Information Response
|R8|
p. 597
9.2.2.19bb
HS-DSCH FDD Secondary Serving Information To Modify
|R8|
p. 598
9.2.2.19bc
HS-DSCH FDD Secondary Serving Information To Modify Unsynchronised
|R8|
p. 600
9.2.2.19c
HS-DSCH FDD Update Information
|R5|
p. 602
9.2.2.19ca
HS-DSCH FDD Secondary Serving Update Information
|R8|
p. 602
9.2.2.19C
HS-DSCH Configured Indicator
|R15|
p. 603
9.2.2.19d
HS-SCCH Power Offset
|R7|
p. 603
9.2.2.19e
E-DCH FDD Update Information
|R6|
p. 603
9.2.2.19f
HS-DSCH Serving Cell Change Information
|R6|
p. 603
9.2.2.19g
HS-DSCH Serving Cell Change Information Response
|R6|
p. 604
9.2.2.19ga
HS-DSCH Secondary Serving Cell Change Information Response
|R8|
p. 604
9.2.2.19G
HS-DSCH TB Size Table Indicator
|R15|
p. 604
9.2.2.19h
E-DCH Serving Cell Change Information Response
|R6|
p. 605
9.2.2.20
IB_SG_POS
p. 605
9.2.2.21
IB_SG_REP
p. 605
9.2.2.21a
Inner Loop DL PC Status
|R15|
p. 605
9.2.2.21b
Initial DL DPCH Timing Adjustment Allowed
|R15|
p. 605
9.2.2.21A
Limited Power Increase
p. 605
9.2.2.21B
IPDL FDD Parameters
p. 606
9.2.2.21C
Length of TFCI2
|R4|
p. 606
9.2.2.21D
Void
9.2.2.21E
Void
9.2.2.21F
Void
9.2.2.22
Max Adjustment Period
p. 606
9.2.2.23
Max Adjustment Step
p. 606
9.2.2.24
Max Number of UL DPDCHs
p. 606
9.2.2.24a
CQI Feedback Cycle k
|R5|
p. 606
9.2.2.24b
CQI Power Offset
|R5|
p. 607
9.2.2.24c
CQI Repetition Factor
|R5|
p. 607
9.2.2.24d
Measurement Power Offset
|R5|
p. 607
9.2.2.24e
Maximum Set of E-DPDCHs
|R6|
p. 607
9.2.2.24f
Void
9.2.2.24A
Min DL Channelisation Code Length
|R15|
p. 607
9.2.2.25
Min UL Channelisation Code Length
p. 608
9.2.2.26
Multiplexing Position
p. 608
9.2.2.26a
NACK Power Offset
|R15|
p. 608
9.2.2.26A
Number of DL Channelisation Codes
p. 608
9.2.2.27
Pattern Duration (PD)
p. 608
9.2.2.27x
PC Preamble
p. 608
9.2.2.27A
PDSCH Code Mapping
p. 608
9.2.2.27B
Phase Reference Update Indicator
|R5|
p. 609
9.2.2.28
Power Adjustment Type
p. 609
9.2.2.29
Power Control Mode (PCM)
p. 609
9.2.2.30
Power Offset
p. 609
9.2.2.31
Power Resume Mode (PRM)
p. 609
9.2.2.31A
Preamble Signatures
p. 609
9.2.2.32
Primary CPICH Ec/No
p. 609
9.2.2.32A
Primary CPICH Usage For Channel Estimation
|R5|
p. 610
9.2.2.33
Propagation Delay (PD)
p. 610
9.2.2.33x
Extended Propagation Delay
|R7|
p. 610
9.2.2.33A
PRACH Minimum Spreading Factor
p. 610
9.2.2.34
QE-Selector
p. 610
9.2.2.34x
Qth Parameter
|R5|
p. 610
9.2.2.34A
RACH Sub Channel Numbers
p. 610
9.2.2.35
RL Set ID
p. 610
9.2.2.35x
RL Specific E-DCH Information
|R6|
p. 611
9.2.2.35A
Received Total Wide Band Power
p. 611
9.2.2.36
S-Field Length
p. 611
9.2.2.36A
Void
9.2.2.37
Scrambling Code Change
p. 611
9.2.2.37A
Scrambling Code Number
p. 611
9.2.2.37B
Secondary CCPCH Info
p. 611
9.2.2.38
Secondary CCPCH Slot Format
p. 612
9.2.2.38A
Secondary CPICH Information
|R5|
p. 612
9.2.2.38B
Secondary CPICH Information Change
|R5|
p. 612
9.2.2.38C
Serving E-DCH RL
|R6|
p. 612
9.2.2.39
Slot Number (SN)
p. 612
9.2.2.39x
Split Type
p. 612
9.2.2.39A
SRB Delay
p. 612
9.2.2.40
SSDT Cell Identity
p. 613
9.2.2.40A
SSDT Cell Identity for EDSCHPC
|R4|
p. 613
9.2.2.41
SSDT Cell Identity Length
p. 613
9.2.2.42
SSDT Indication
p. 613
9.2.2.43
SSDT Support Indicator
p. 613
9.2.2.44
STTD Indicator
p. 613
9.2.2.45
STTD Support Indicator
p. 613
9.2.2.45A
Synchronisation Indicator
|R6|
p. 613
9.2.2.46
TFCI Signalling Mode
p. 613
9.2.2.46A
TFCI PC Support Indicator
|R5|
p. 614
9.2.2.47
Transmission Gap Distance (TGD)
p. 614
9.2.2.47A
Transmission Gap Pattern Sequence Information
p. 614
9.2.2.47B
Transmission Gap Pattern Sequence Scrambling Code Information
p. 616
9.2.2.48
Transmit Diversity Indicator
p. 616
9.2.2.49
Transmit Gap Length (TGL)
p. 616
9.2.2.50
Tx Diversity Indicator
p. 616
9.2.2.50A
UE Support Of Dedicated Pilots For Channel Estimation
|R5|
p. 617
9.2.2.50B
UE Support Of Dedicated Pilots For Channel Estimation Of HS-DSCH
|R5|
p. 617
9.2.2.51
UL/DL Compressed Mode Selection
p. 617
9.2.2.52
UL DPCCH Slot Format
p. 617
9.2.2.52A
UL DPDCH Indicator for E-DCH operation
|R6|
p. 617
9.2.2.53
UL Scrambling Code
p. 617
9.2.2.54
Uplink Delta SIR
p. 617
9.2.2.55
Uplink Delta SIR After
p. 618
9.2.2.56
DPC Mode Change Support Indicator
|R4|
p. 618
9.2.2.57
HARQ Preamble Mode
|R6|
p. 618
9.2.2.58
HARQ Preamble Mode Activation Indicator
|R6|
p. 618
9.2.2.59
Frequency Band Indicator
|R6|
p. 618
9.2.2.60
E-RGCH Release Indicator
|R6|
p. 619
9.2.2.61
E-AGCH Power Offset
|R6|
p. 619
9.2.2.61A
E-AGCH Table Choice
|R7|
p. 619
9.2.2.62
E-RGCH Power Offset
|R6|
p. 620
9.2.2.63
E-HICH Power Offset
|R6|
p. 620
9.2.2.64
E-RGCH 2-Index-Step Threshold
|R6|
p. 620
9.2.2.65
E-RGCH 3-Index-Step Threshold
|R6|
p. 620
9.2.2.66
HARQ Info for E-DCH
|R6|
p. 620
9.2.2.67
DCH Indicator For E-DCH-HSDPA Operation
|R6|
p. 621
9.2.2.68
E-RGCH and E-HICH Channelisation Code Validity Indicator
|R6|
p. 621
9.2.2.69
E-DCH Minimum Set E-TFCI Validity Indicator
|R6|
p. 621
9.2.2.70
Fast Reconfiguration Mode
|R7|
p. 621
9.2.2.71
Fast Reconfiguration Permission
|R7|
p. 622
9.2.2.72
Continuous Packet Connectivity DTX-DRX Information
|R7|
p. 622
9.2.2.73
Continuous Packet Connectivity DTX-DRX Information To Modify
|R7|
p. 624
9.2.2.74
Continuous Packet Connectivity HS-SCCH less Information
|R7|
p. 626
9.2.2.75
Continuous Packet Connectivity HS-SCCH less Information Response
|R7|
p. 626
9.2.2.75A
Continuous Packet Connectivity HS-SCCH Less Deactivate Indicator
|R7|
p. 627
9.2.2.76
MIMO Activation Indicator
|R7|
p. 627
9.2.2.77
MIMO Mode Indicator
|R7|
p. 627
9.2.2.78
MIMO Information Response
|R7|
p. 627
9.2.2.79
SixtyfourQAM DL Support Indicator
|R7|
p. 627
9.2.2.79A
Sixtyfour QAM Usage Allowed Indicator
|R7|
p. 627
9.2.2.79B
SixtyfourQAM DL Usage Indicator
|R7|
p. 628
9.2.2.80
Enhanced FACH Support Indicator
|R7|
p. 628
9.2.2.81
Enhanced PCH Support Indicator
|R7|
p. 628
9.2.2.82
Priority Queue Information for Enhanced FACH/PCH
|R7|
p. 628
9.2.2.83
SixteenQAM UL Information
|R7|
p. 628
9.2.2.84
SixteenQAM UL Information To Modify
|R7|
p. 628
9.2.2.85
F-DPCH Slot Format
|R7|
p. 628
9.2.2.86
F-DPCH Slot Format Support Request
|R7|
p. 628
9.2.2.87
Max UE DTX Cycle
|R7|
p. 628
9.2.2.88
Enhanced PCH Capability
|R7|
p. 629
9.2.2.89
MAC-ehs Reset Timer
|R7|
p. 629
9.2.2.90
SixteenQAM UL Operation Indicator
|R7|
p. 629
9.2.2.90a
SixtyfourQAM UL Operation Indicator
|R11|
p. 629
9.2.2.91
E-TFCI Boost Information
|R7|
p. 629
9.2.2.92
Common E-DCH Support Indicator
|R7|
p. 629
9.2.2.93
Common E-DCH MAC-d Flow Specific Information
|R7|
p. 629
9.2.2.94
Counting Information
|R8|
p. 630
9.2.2.95
Transmission Mode Information
|R8|
p. 630
9.2.2.96
MBMS Neighbouring Cell Information
|R8|
p. 631
9.2.2.97
RLC Sequence Number
|R8|
p. 631
9.2.2.98
Time Stamp
|R8|
p. 631
9.2.2.99
HS-DSCH Preconfiguration Info
|R8|
p. 631
9.2.2.100
HS-DSCH Preconfiguration Setup
|R8|
p. 633
9.2.2.101
Secondary Serving Cell List
|R8|
p. 636
9.2.2.102
Minimum Reduced E-DPDCH Gain Factor
|R8|
p. 636
9.2.2.103
UE Support Indicator Extension
|R8|
p. 636
9.2.2.104
Power Offset For S-CPICH for MIMO
|R8|
p. 637
9.2.2.105
Power Offset For S-CPICH for MIMO Request Indicator
|R8|
p. 637
9.2.2.106
Single Stream MIMO Activation Indicator
|R8|
p. 638
9.2.2.107
Single Stream MIMO Mode Indicator
|R8|
p. 638
9.2.2.108
HS-DSCH MAC-ehs Format
|R8|
p. 638
9.2.2.109
Activation Information
|R9|
p. 638
9.2.2.110
Additional E-DCH FDD Setup Information
|R9|
p. 639
9.2.2.111
Additional E-DCH Configuration Change Information
|R9|
p. 640
9.2.2.112
Additional E-DCH FDD Information
|R9|
p. 641
9.2.2.113
Multicell E-DCH Transport Bearer Mode
|R9|
p. 641
9.2.2.114
Multicell E-DCH Information
|R9|
p. 642
9.2.2.115
Additional E-DCH RL Specific Information To Setup
|R9|
p. 642
9.2.2.116
Additional E-DCH RL Specific Information To Add
|R9|
p. 643
9.2.2.117
Additional E-DCH RL Specific Information To Modify
|R9|
p. 643
9.2.2.118
Additional E-DCH MAC-d Flow Specific Information
|R9|
p. 644
9.2.2.119
Multicell E-DCH RL Specific Information
|R9|
p. 644
9.2.2.120
Additional E-DCH FDD Information Response
|R9|
p. 644
9.2.2.121
Additional Modified E-DCH FDD Information Response
|R9|
p. 646
9.2.2.122
Additional E-DCH FDD Update Information
|R9|
p. 646
9.2.2.123
Cell Capability Container Extension FDD
|R9|
p. 647
9.2.2.124
Non-Serving RL Preconfiguration Setup
|R9|
p. 651
9.2.2.125
Non-Serving RL Preconfiguration Info
|R9|
p. 651
9.2.2.126
Void
9.2.2.127
Usefulness of Battery Optimization
|R10|
p. 653
9.2.2.128
M1 Report
|R10|
p. 653
9.2.2.129
Support of Dynamic DTXDRX Related HS-SCCH Order
|R9|
p. 653
9.2.2.130
UL CLTD Information Reconf
|R11|
p. 653
9.2.2.131
UL CLTD Information
|R11|
p. 654
9.2.2.132
UL CLTD Information To Modify
|R11|
p. 654
9.2.2.133
UL CLTD Information Removal
|R11|
p. 654
9.2.2.134
UL CLTD State Update Information
|R11|
p. 655
9.2.2.135
F-TPICH Slot Format
|R11|
p. 655
9.2.2.136
F-TPICH Offset
|R11|
p. 655
9.2.2.137
S-DPCCH Power Offset Information
|R11|
p. 655
9.2.2.138
UL CLTD Activation Information
|R11|
p. 655
9.2.2.139
F-TPICH Information
|R11|
p. 655
9.2.2.140
F-TPICH Information To Modify
|R11|
p. 656
9.2.2.141
F-TPICH Information Removal
|R11|
p. 656
9.2.2.142
F-TPICH Information Reconf
|R11|
p. 656
9.2.2.143
F-TPICH Information Response
|R11|
p. 656
9.2.2.144
F-TPICH Reconfiguration Information
|R11|
p. 656
9.2.2.145
MIMO with four transmit antennas Activation Indicator
|R11|
p. 657
9.2.2.146
MIMO with four transmit antennas Mode Indicator
|R11|
p. 657
9.2.2.147
Power Offset For S-CPICH for MIMO with four transmit antennas Request Indicator
|R11|
p. 657
9.2.2.148
Power Offset For S-CPICH for MIMO with four transmit antennas
|R11|
p. 657
9.2.2.149
Dual Stream MIMO with four transmit antennas Activation Indicator
|R11|
p. 658
9.2.2.150
Dual Stream MIMO with four transmit antennas Mode Indicator
|R11|
p. 658
9.2.2.151
Multiflow Reconfiguration
|R11|
p. 658
9.2.2.152
Multiflow Information
|R11|
p. 658
9.2.2.153
Multiflow Information To Modify
|R11|
p. 659
9.2.2.154
Multiflow Stop
|R11|
p. 659
9.2.2.155
Multiflow Role
|R11|
p. 660
9.2.2.156
Multiflow MIMO
|R11|
p. 660
9.2.2.157
Multiflow Timing
|R11|
p. 660
9.2.2.158
UL MIMO Reconfiguration
|R11|
p. 660
9.2.2.159
UL MIMO Information
|R11|
p. 661
9.2.2.160
UL MIMO Information To Modify
|R11|
p. 661
9.2.2.161
UL MIMO Information Removal
|R11|
p. 661
9.2.2.162
UL MIMO DL Control Channel Information
|R11|
p. 662
9.2.2.163
E-ROCH Power Offset
|R11|
p. 662
9.2.2.164
S-E-DPCCH Power Offset
|R11|
p. 662
9.2.2.165
Inter-stream Interference Compensation Index
|R11|
p. 662
9.2.2.166
Secondary Transport Block E-HICH Release Indicator
|R11|
p. 663
9.2.2.167
Precoder weight set restriction
|R11|
p. 663
9.2.2.168
Multiflow Repetition Factors
|R11|
p. 663
9.2.2.169
E-DCH Decoupling Indication
|R12|
p. 663
9.2.2.170
DCH Enhancements Information Reconf
|R12|
p. 664
9.2.2.171
DCH Enhancements Information
|R12|
p. 664
9.2.2.172
DCH Enhancements Information to Modify
|R12|
p. 665
9.2.2.173
DCH Enhancements Information Removal
|R12|
p. 665
9.2.2.174
Gain Factors 10ms Mode
|R12|
p. 665
9.2.2.175
Extended E-DPCCH Power Offset
|R12|
p. 666
9.2.2.176
Radio Links without DPCH/F-DPCH Indication
|R12|
p. 666
9.2.2.177
UL DPCCH2 Reconfiguration
|R12|
p. 666
9.2.2.178
UL DPCCH2 Information
|R12|
p. 667
9.2.2.179
UL DPCCH2 Information To Modify
|R12|
p. 667
9.2.2.180
UL DPCCH2 Information Removal
|R12|
p. 667
9.2.2.181
CQI Feedback Cycle2 k
|R12|
p. 667
9.2.2.182
UE Measurement Forwarding
|R12|
p. 668
9.2.2.183
UE Measurement Value
|R12|
p. 668
9.2.2.184
TTI Update Indication
|R12|
p. 668
9.2.2.185
Activation Delay
|R12|
p. 668
9.2.2.186
Fast TTI switching Mode Supported
|R12|
p. 668
9.2.2.187
Fast TTI switching Mode Requested Synchronized
|R12|
p. 669
9.2.2.188
Fast TTI switching Mode Requested UnSynchronized
|R12|
p. 669
9.2.2.189
PLMN Identity
|R13|
p. 669
9.2.2.190
Downlink TPC enhancements Information
|R13|
p. 669
9.2.2.191
Downlink TPC enhancements Reconf
|R13|
p. 670
9.2.2.192
Downlink TPC enhancements Information Removal
|R13|
p. 670
9.2.2.193
TPC slot position
|R13|
p. 670
9.2.2.194
Dual Cell E-DCH Operation Enhancements Information
|R14|
p. 671